simulavr  1.1.0
atmega668base.cpp
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1  /*
2  ****************************************************************************
3  *
4  * simulavr - A simulator for the Atmel AVR family of microcontrollers.
5  * Copyright (C) 2001, 2002, 2003 Klaus Rudolph
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20  *
21  ****************************************************************************
22  */
23 #include "atmega668base.h"
24 
25 #include "irqsystem.h"
26 #include "hwstack.h"
27 #include "hweeprom.h"
28 #include "hwwado.h"
29 #include "hwsreg.h"
30 #include "avrerror.h"
31 #include "avrfactory.h"
32 
37 
39  delete usart0;
40  delete wado;
41  delete spi;
42  delete acomp;
43  delete ad;
44  delete aref;
45  delete admux;
46  delete gpior2_reg;
47  delete gpior1_reg;
48  delete gpior0_reg;
49  delete timer2;
50  delete timerIrq2;
51  delete timer1;
52  delete inputCapture1;
53  delete timerIrq1;
54  delete timer0;
55  delete timerIrq0;
56  delete extirqpc;
57  delete pcmsk2_reg;
58  delete pcmsk1_reg;
59  delete pcmsk0_reg;
60  delete pcifr_reg;
61  delete pcicr_reg;
62  delete extirq01;
63  delete eifr_reg;
64  delete eimsk_reg;
65  delete eicra_reg;
66  delete osccal_reg;
67  delete clkpr_reg;
68  delete stack;
69  delete eeprom;
70  delete irqSystem;
71  delete spmRegister;
72 }
73 
75  unsigned flash_bytes,
76  unsigned ee_bytes ):
77  AvrDevice(224, // I/O space above General Purpose Registers
78  ram_bytes, // RAM size
79  0, // External RAM size
80  flash_bytes), // Flash Size
81  adc6(),
82  adc7(),
83  portb(this, "B", true),
84  portc(this, "C", true, 7),
85  portd(this, "D", true),
86  gtccr_reg(&coreTraceGroup, "GTCCR"),
87  assr_reg(&coreTraceGroup, "ASSR"),
88  prescaler01(this, "01", &gtccr_reg, 0, 7),
89  prescaler2(this, "2", PinAtPort(&portb, 6), &assr_reg, 5, &gtccr_reg, 1, 7),
90  premux0(&prescaler01, PinAtPort(&portd, 4)),
91  premux1(&prescaler01, PinAtPort(&portd, 5)),
92  premux2(&prescaler2)
93 {
94  flagJMPInstructions = (flash_bytes > 8U * 1024U) ? true : false;
95  if(flash_bytes > 4U * 1024U) {
96  if(flash_bytes > 16U * 1024U) {
97  // atmega328
98  fuses->SetFuseConfiguration(19, 0xffd962);
99  fuses->SetBootloaderConfig(0x3800, 0x800, 9, 8);
101 
102  } else {
103  // atmega88, atmega168
104  fuses->SetFuseConfiguration(19, 0xf9df62);
105  if(flash_bytes > 8U * 1024U) {
106  // atmega168
107  fuses->SetBootloaderConfig(0x1c00, 0x400, 17, 16);
109  } else {
110  // atmega88
111  fuses->SetBootloaderConfig(0x0c00, 0x400, 17, 16);
113  }
114  }
115  } else {
116  // atmega48
117  fuses->SetFuseConfiguration(17, 0xffdf62);
119  }
120  irqSystem = new HWIrqSystem(this, (flash_bytes > 8U * 1024U) ? 4 : 2, 26);
121 
122  eeprom = new HWEeprom(this, irqSystem, ee_bytes, 22, HWEeprom::DEVMODE_EXTENDED);
123  // initialize stack: size=10,11,11,12 bit and init to RAMEND
124  int stack_size = 10;
125  if(ram_bytes >= 1U * 1024U) {
126  if(ram_bytes > 1U * 1024U)
127  stack_size = 12;
128  else
129  stack_size = 11;
130  }
131  stack = new HWStackSram(this, stack_size, true);
132  clkpr_reg = new CLKPRRegister(this, &coreTraceGroup);
134 
135  RegisterPin("ADC6", &adc6);
136  RegisterPin("ADC7", &adc7);
137 
138  eicra_reg = new IOSpecialReg(&coreTraceGroup, "EICRA");
139  eimsk_reg = new IOSpecialReg(&coreTraceGroup, "EIMSK");
140  eifr_reg = new IOSpecialReg(&coreTraceGroup, "EIFR");
142  extirq01->registerIrq(1, 0, new ExternalIRQSingle(eicra_reg, 0, 2, GetPin("D2")));
143  extirq01->registerIrq(2, 1, new ExternalIRQSingle(eicra_reg, 2, 2, GetPin("D3")));
144 
145  pcicr_reg = new IOSpecialReg(&coreTraceGroup, "PCICR");
146  pcifr_reg = new IOSpecialReg(&coreTraceGroup, "PCIFR");
147  pcmsk0_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK0");
148  pcmsk1_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK1");
149  pcmsk2_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK2");
154 
155  timerIrq0 = new TimerIRQRegister(this, irqSystem, 0);
156  timerIrq0->registerLine(0, IRQLine("TOV0", 16));
157  timerIrq0->registerLine(1, IRQLine("OCF0A", 14));
158  timerIrq0->registerLine(2, IRQLine("OCF0B", 15));
159 
160  timer0 = new HWTimer8_2C(this,
161  &premux0,
162  0,
163  timerIrq0->getLine("TOV0"),
164  timerIrq0->getLine("OCF0A"),
165  PinAtPort(&portd, 6),
166  timerIrq0->getLine("OCF0B"),
167  PinAtPort(&portd, 5));
168 
169  timerIrq1 = new TimerIRQRegister(this, irqSystem, 1);
170  timerIrq1->registerLine(0, IRQLine("TOV1", 13));
171  timerIrq1->registerLine(1, IRQLine("OCF1A", 11));
172  timerIrq1->registerLine(2, IRQLine("OCF1B", 12));
173  timerIrq1->registerLine(5, IRQLine("ICF1", 10));
174 
176  timer1 = new HWTimer16_2C3(this,
177  &premux1,
178  1,
179  timerIrq1->getLine("TOV1"),
180  timerIrq1->getLine("OCF1A"),
181  PinAtPort(&portb, 1),
182  timerIrq1->getLine("OCF1B"),
183  PinAtPort(&portb, 2),
184  timerIrq1->getLine("ICF1"),
185  inputCapture1);
186 
187  timerIrq2 = new TimerIRQRegister(this, irqSystem, 2);
188  timerIrq2->registerLine(0, IRQLine("TOV2", 9));
189  timerIrq2->registerLine(1, IRQLine("OCF2A", 7));
190  timerIrq2->registerLine(2, IRQLine("OCF2B", 8));
191 
192  timer2 = new HWTimer8_2C(this,
193  &premux2,
194  2,
195  timerIrq2->getLine("TOV2"),
196  timerIrq2->getLine("OCF2A"),
197  PinAtPort(&portb, 3),
198  timerIrq2->getLine("OCF2B"),
199  PinAtPort(&portd, 3));
200 
201  gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0");
202  gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
203  gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
204 
205  admux = new HWAdmuxM8(this, &portc.GetPin(0), // ADC0
206  &portc.GetPin(1), // ADC1
207  &portc.GetPin(2), // ADC2
208  &portc.GetPin(3), // ADC3
209  &portc.GetPin(4), // ADC4
210  &portc.GetPin(5), // ADC5
211  &adc6, // ADC6 only TQFP version
212  &adc7); // ADC7 only TQFP version
213 
214  aref = new HWARef4(this, HWARef4::REFTYPE_BG4);
215 
216  ad = new HWAd(this, HWAd::AD_M48, irqSystem, 21, admux, aref); // Interrupt Vector ADC Conversion Complete
217 
218  acomp = new HWAcomp(this, irqSystem, PinAtPort(&portd, 6), PinAtPort(&portd, 7), 23, ad, timer1);
219 
220  spi = new HWSpi(this,
221  irqSystem,
222  PinAtPort(&portb, 3), // MOSI
223  PinAtPort(&portb, 4), // MISO
224  PinAtPort(&portb, 5), // SCK
225  PinAtPort(&portb, 2), // /SS
226  17, // irqvec
227  true);
228 
229  wado = new HWWado(this);
230 
231  usart0 = new HWUsart(this,
232  irqSystem,
233  PinAtPort(&portd,1), // TXD
234  PinAtPort(&portd,0), // RXD
235  PinAtPort(&portd, 4), // XCK
236  18, // (18) RX complete vector
237  19, // (19) UDRE vector
238  20); // (20) TX complete vector
239 
240  rw[0xC6]= & usart0->udr_reg;
241  rw[0xC5]= & usart0->ubrrhi_reg;
242  rw[0xC4]= & usart0->ubrr_reg;
243  // 0xC3 reserved
244  rw[0xC2]= & usart0->ucsrc_reg;
245  rw[0xC1]= & usart0->ucsrb_reg;
246  rw[0xC0]= & usart0->ucsra_reg;
247  // 0xBF reserved
254  // 0xB7 reserved
255  rw[0xb6]= & assr_reg;
256  // 0xb5 reserved
257  rw[0xb4]= & timer2->ocrb_reg;
258  rw[0xb3]= & timer2->ocra_reg;
259  rw[0xb2]= & timer2->tcnt_reg;
260  rw[0xb1]= & timer2->tccrb_reg;
261  rw[0xb0]= & timer2->tccra_reg;
262  // 0x8c - 0xaf reserved
263  rw[0x8b]= & timer1->ocrb_h_reg;
264  rw[0x8a]= & timer1->ocrb_l_reg;
265  rw[0x89]= & timer1->ocra_h_reg;
266  rw[0x88]= & timer1->ocra_l_reg;
267  rw[0x87]= & timer1->icr_h_reg;
268  rw[0x86]= & timer1->icr_l_reg;
269  rw[0x85]= & timer1->tcnt_h_reg;
270  rw[0x84]= & timer1->tcnt_l_reg;
271  // 0x83 reserved
272  rw[0x82]= & timer1->tccrc_reg;
273  rw[0x81]= & timer1->tccrb_reg;
274  rw[0x80]= & timer1->tccra_reg;
277  // 0x7D reserved
278  rw[0x7C]= & ad->admux_reg;
279  rw[0x7B]= & ad->adcsrb_reg;
280  rw[0x7A]= & ad->adcsra_reg;
281  rw[0x79]= & ad->adch_reg;
282  rw[0x78]= & ad->adcl_reg;
283  // 0x71 - 0x77 reserved
284  rw[0x70]= & timerIrq2->timsk_reg;
285  rw[0x6F]= & timerIrq1->timsk_reg;
286  rw[0x6E]= & timerIrq0->timsk_reg;
287 
288  rw[0x6d]= pcmsk2_reg;
289  rw[0x6c]= pcmsk1_reg;
290  rw[0x6b]= pcmsk0_reg;
291  // 0x6A reserved
292  rw[0x69]= eicra_reg;
293  rw[0x68]= pcicr_reg;
294  // 0x67 reserved
295  rw[0x66]= osccal_reg;
296  // 0x65 reserved
298  // 0x63 reserved
299  // 0x62 reserved
300  rw[0x61]= clkpr_reg;
302  rw[0x5f]= statusRegister;
303  rw[0x5e]= & ((HWStackSram *)stack)->sph_reg;
304  rw[0x5d]= & ((HWStackSram *)stack)->spl_reg;
305  // 0x58 - 0x5C reserved
306  rw[0x57]= & spmRegister->spmcr_reg;
307  // 0x56 reserved
311  // 0x52 reserved
312  // 0x51 reserved
313  rw[0x50]= & acomp->acsr_reg;
314  // 0x4F reserved
315  rw[0x4E]= & spi->spdr_reg;
316  rw[0x4D]= & spi->spsr_reg;
317  rw[0x4C]= & spi->spcr_reg;
318  rw[0x4B]= gpior2_reg;
319  rw[0x4A]= gpior1_reg;
320  // 0x49 reserved
321  rw[0x48]= & timer0->ocrb_reg;
322  rw[0x47]= & timer0->ocra_reg;
323  rw[0x46]= & timer0->tcnt_reg;
324  rw[0x45]= & timer0->tccrb_reg;
325  rw[0x44]= & timer0->tccra_reg;
326  rw[0x43]= & gtccr_reg;
327  rw[0x42]= & eeprom->eearh_reg;
328  rw[0x41]= & eeprom->eearl_reg;
329  rw[0x40]= & eeprom->eedr_reg;
330  rw[0x3F]= & eeprom->eecr_reg;
331  rw[0x3E]= gpior0_reg;
332  rw[0x3D]= eimsk_reg;
333  rw[0x3C]= eifr_reg;
334  rw[0x3b]= pcifr_reg;
335  // 0x38, 0x39, 0x3A reserved
336  rw[0x37]= & timerIrq2->tifr_reg;
337  rw[0x36]= & timerIrq1->tifr_reg;
338  rw[0x35]= & timerIrq0->tifr_reg;
339  // 0x2C - 0x34 reserved
340  rw[0x2B]= & portd.port_reg;
341  rw[0x2A]= & portd.ddr_reg;
342  rw[0x29]= & portd.pin_reg;
343 
344  rw[0x28]= & portc.port_reg;
345  rw[0x27]= & portc.ddr_reg;
346  rw[0x26]= & portc.pin_reg;
347 
348  rw[0x25]= & portb.port_reg;
349  rw[0x24]= & portb.ddr_reg;
350  rw[0x23]= & portb.pin_reg;
351 
352  Reset();
353 }
354 
ADC reference is selected on 3 or 4 different sources: Vcc, aref pin, bandgap or 2.56V reference.
Definition: hwad.h:60
Basic AVR device, contains the core functionality.
Definition: avrdevice.h:66
AvrFuses * fuses
Definition: avrdevice.h:100
GPIORegister * gpior0_reg
general purpose IO register
Definition: atmega668base.h:80
HWTimer8_2C * timer0
timer 0 unit
Definition: atmega668base.h:74
ExternalIRQHandler * extirqpc
external interrupt support for PCINT[0-2]
Definition: atmega668base.h:61
TimerIRQRegister * timerIrq2
timer interrupt unit for timer 2
Definition: atmega668base.h:78
HWIrqSystem * irqSystem
Definition: avrdevice.h:104
IOReg< HWAd > admux_reg
Definition: hwad.h:269
Implements a stack with stack register using RAM as stackarea.
Definition: hwstack.h:131
IOReg< HWUart > ubrrhi_reg
IO register "UBRRxH" - baudrate.
Definition: hwuart.h:136
IOReg< HWEeprom > eedr_reg
Definition: hweeprom.h:101
IOSpecialReg * pcifr_reg
PCIFR IO register.
Definition: atmega668base.h:63
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
Definition: externalirq.cpp:53
IOReg< HWTimer16 > ocra_h_reg
output compare A register, high byte
Definition: hwtimer.h:312
Implement CLKPR register.
Definition: rwmem.h:135
bool flagJMPInstructions
CALL and JMP instructions are available (only on devices with bigger flash)
Definition: avrdevice.h:116
Pin & GetPin(unsigned char pinNo)
returns a pin reference of pin with pin number
Definition: hwport.cpp:87
ExternalIRQHandler * extirq01
external interrupt support for INT0, INT1
Definition: atmega668base.h:57
ICaptureSource * inputCapture1
input capture source for timer1
Definition: atmega668base.h:75
oscillator version 5.x, 8bit, two ranges
Definition: rwmem.h:181
Pin adc6
adc channel 6 input pin
Definition: atmega668base.h:45
IOSpecialReg gtccr_reg
GTCCR IO register.
Definition: atmega668base.h:50
HWAcomp * acomp
analog compare unit
Definition: atmega668base.h:70
IOReg< HWTimer16 > ocra_l_reg
output compare A register, low byte
Definition: hwtimer.h:313
IOReg< HWAcomp > acsr_reg
ACSR IO register.
Definition: hwacomp.h:82
IOReg< HWTimer8 > tcnt_reg
counter register
Definition: hwtimer.h:229
Definition: hwwado.h:38
HWSpi * spi
spi unit
Definition: atmega668base.h:71
void RegisterPin(const std::string &name, Pin *p)
Definition: avrdevice.h:171
A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets.
Definition: rwmem.h:113
IOReg< HWTimer16 > tcnt_h_reg
counter register, high byte
Definition: hwtimer.h:310
Handler for external IRQ&#39;s to communicate with IRQ system and mask/flag registers.
Definition: externalirq.h:41
IOSpecialReg * eicra_reg
EICRA IO register.
Definition: atmega668base.h:58
Represents a timer interrupt line, Frontend for timer interrupts.
Definition: timerirq.h:42
OSCCALRegister * osccal_reg
OSCCAL IO register.
Definition: atmega668base.h:84
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
Definition: flashprog.cpp:246
IOReg< HWUart > ubrr_reg
IO register "UBRRxL" - baudrate.
Definition: hwuart.h:136
GPIORegister * gpior1_reg
general purpose IO register
Definition: atmega668base.h:81
IOReg< HWTimer16_2C3 > tccra_reg
control register A
Definition: hwtimer.h:615
IOReg< HWTimer8_2C > tccrb_reg
control register B
Definition: hwtimer.h:440
IOSpecialReg tifr_reg
the TIFRx register
Definition: timerirq.h:74
IOReg< HWAd > adcsrb_reg
Definition: hwad.h:269
IOReg< HWSpi > spdr_reg
Definition: hwspi.h:121
Implements the I/O hardware necessary to do USART transfers.
Definition: hwuart.h:149
IOReg< HWTimer16_2C3 > tccrb_reg
control register B
Definition: hwtimer.h:616
IOReg< HWPort > port_reg
Definition: hwport.h:84
HWTimer8_2C * timer2
timer 2 unit
Definition: atmega668base.h:79
IOReg< HWUart > ucsra_reg
Definition: hwuart.h:136
void Reset()
Definition: avrdevice.cpp:390
IOReg< HWPort > pin_reg
Definition: hwport.h:84
IOReg< HWTimer8_2C > tccra_reg
control register A
Definition: hwtimer.h:439
IOReg< HWTimer16 > icr_h_reg
input capture register, high byte
Definition: hwtimer.h:318
IOReg< HWSpi > spcr_reg
Definition: hwspi.h:121
Timer unit with 16Bit counter and 2 output compare units, but 3 config registers. ...
Definition: hwtimer.h:593
AVR device class for ATMega168, see AvrDevice_atmega668base.
IOSpecialReg * pcmsk1_reg
PCIMSK1 IO register.
Definition: atmega668base.h:65
TraceValueCoreRegister coreTraceGroup
Definition: avrdevice.h:108
IOReg< HWUart > ucsrb_reg
Definition: hwuart.h:136
IOSpecialReg * eimsk_reg
EIMSK IO register.
Definition: atmega668base.h:59
IOReg< HWTimer16 > icr_l_reg
input capture register, low byte
Definition: hwtimer.h:319
HWARef * aref
ADC reference unit.
Definition: atmega668base.h:68
IOSpecialReg * pcmsk0_reg
PCIMSK0 IO register.
Definition: atmega668base.h:64
TimerIRQRegister * timerIrq0
timer interrupt unit for timer 0
Definition: atmega668base.h:73
0:aref, 1:vcc, 2:-, 3:bg
Definition: hwad.h:69
IOSpecialReg * pcicr_reg
PCICR IO register.
Definition: atmega668base.h:62
IOReg< HWAd > adcsra_reg
Definition: hwad.h:269
IOReg< HWEeprom > eearh_reg
Definition: hweeprom.h:101
GPIORegister * gpior2_reg
general purpose IO register
Definition: atmega668base.h:82
IOReg< HWTimer16 > tcnt_l_reg
counter register, low byte
Definition: hwtimer.h:311
Pin * GetPin(const char *name)
Definition: avrdevice.cpp:76
IOReg< HWTimer16 > ocrb_l_reg
output compare B register, low byte
Definition: hwtimer.h:315
HWAdmux * admux
adc multiplexer unit
Definition: atmega668base.h:67
CLKPRRegister * clkpr_reg
CLKPR IO register.
Definition: atmega668base.h:83
IOSpecialReg assr_reg
ASSR IO register.
Definition: atmega668base.h:51
PrescalerMultiplexer premux2
prescaler multiplexer for timer 2
Definition: atmega668base.h:56
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
Definition: timerirq.h:61
IOReg< HWEeprom > eecr_reg
Definition: hweeprom.h:101
Pin adc7
adc channel 7 input pin
Definition: atmega668base.h:46
HWAd * ad
adc unit
Definition: atmega668base.h:69
HWEeprom * eeprom
Definition: avrdevice.h:102
IOSpecialReg * eifr_reg
EIFR IO register.
Definition: atmega668base.h:60
Definition: hwspi.h:38
AVR device class for ATMega328, see AvrDevice_atmega668base.
AVR device class for ATMega48, see AvrDevice_atmega668base.
void registerLine(int idx, IRQLine *irq)
Definition: timerirq.cpp:88
IOSpecialReg * pcmsk2_reg
PCIMSK2 IO register.
Definition: atmega668base.h:66
#define AVR_REGISTER(name, class)
Definition: avrfactory.h:69
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
Definition: avrdevice.h:129
PrescalerMultiplexerExt premux0
prescaler multiplexer for timer 0
Definition: atmega668base.h:54
Provides the programming engine for flash self programming.
Definition: flashprog.h:38
void SetBootloaderConfig(unsigned addr, int size, int bPosBOOTSZ, int bPosBOOTRST)
Set bootloader support configuration.
Definition: flashprog.cpp:274
IOReg< HWAd > adch_reg
Definition: hwad.h:269
HWUsart * usart0
usart 0 unit
Definition: atmega668base.h:72
IOReg< HWTimer16 > ocrb_h_reg
output compare B register, high byte
Definition: hwtimer.h:314
PrescalerMultiplexerExt premux1
prescaler multiplexer for timer 1
Definition: atmega668base.h:55
IOReg< HWTimer16_2C3 > tccrc_reg
control register C
Definition: hwtimer.h:617
IOReg< HWSpi > spsr_reg
Definition: hwspi.h:121
IOReg< HWEeprom > eearl_reg
Definition: hweeprom.h:101
IOReg< HWAd > adcl_reg
Definition: hwad.h:269
IOReg< HWTimer8 > ocra_reg
output compare A register
Definition: hwtimer.h:230
static NotSimulatedRegister * getRegister(int reg)
Definition: rwmem.cpp:297
HWStack * stack
Definition: avrdevice.h:131
Class, which provides input capture source for 16bit timers.
Definition: icapturesrc.h:34
RWSreg * statusRegister
the memory interface for status
Definition: avrdevice.h:133
IOReg< HWUart > udr_reg
Definition: hwuart.h:136
Timer unit with 8Bit counter and 2 output compare unit.
Definition: hwtimer.h:416
Pin-change interrupt on all pins of a port.
Definition: externalirq.h:137
IRQLine * getLine(const std::string &name)
Definition: timerirq.cpp:109
HWTimer16_2C3 * timer1
timer 1 unit
Definition: atmega668base.h:77
HWWado * wado
WDT timer.
Definition: avrdevice.h:134
Definition: hwad.h:204
AVR device class for ATMega88, see AvrDevice_atmega668base.
FlashProgramming * spmRegister
Definition: avrdevice.h:99
AvrDevice_atmega668base(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes)
IOReg< HWTimer8 > ocrb_reg
output compare B register
Definition: hwtimer.h:231
IOReg< HWPort > ddr_reg
Definition: hwport.h:84
ADC type M48: ADC on atmega48/88/168/328.
Definition: hwad.h:263
IOReg< HWUsart > ucsrc_reg
Definition: hwuart.h:173
IOSpecialReg timsk_reg
the TIMSKx register
Definition: timerirq.h:73
Analog comparator peripheral.
Definition: hwacomp.h:42
IOReg< FlashProgramming > spmcr_reg
Definition: flashprog.h:95
Implement OSCCAL register.
Definition: rwmem.h:174
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
Definition: externalirq.h:110
TimerIRQRegister * timerIrq1
timer interrupt unit for timer 1
Definition: atmega668base.h:76